The Semiconductor Sovereignty Map

Overview

Executive Summary

Global semiconductor capital expenditure is expected to exceed $200 billion in 2026 as the US, EU, Japan, and South Korea pursue supply chain sovereignty through massive subsidies and fab construction.
The US CHIPS Act ($52.7 billion), EU Chips Act (€43 billion), and Japan's semiconductor support (¥4 trillion) represent the largest coordinated industrial policy effort since the post-war era.
TSMC remains the chokepoint: the company manufactures over 90% of the world's most advanced chips (sub-7nm), and its geographic concentration in Taiwan is the single largest supply chain risk in the global economy.
"Friendshoring" is reshaping the semiconductor map. New fabs in Arizona (TSMC, Intel), Germany (Intel, TSMC), Japan (TSMC, Rapidus), and Ireland (Intel) aim to reduce dependence on East Asian manufacturing.
The binding constraint has shifted from chip design to energy. Advanced fabs consume 100+ MW of power, and AI data centre demand is competing with semiconductor manufacturing for the same constrained energy supply.

Geography

Global Fab Construction Pipeline

Region	Key Projects	Investment	Status	Process Nodes
United States	TSMC Arizona, Intel Ohio/Arizona	$52.7B CHIPS Act + private	Construction underway	3nm-5nm (TSMC), 18A (Intel)
European Union	Intel Magdeburg, TSMC Dresden	€43B EU Chips Act	Planning/construction	2nm (Intel), 12-28nm (TSMC)
Japan	TSMC Kumamoto, Rapidus Hokkaido	¥4T+ government support	TSMC Fab 1 operational	12-28nm (TSMC), 2nm (Rapidus)
South Korea	Samsung Pyeongtaek, SK hynix	$470B national plan	Expanding	2nm GAA (Samsung), HBM (SK)
Taiwan	TSMC N2 fabs	$30B+ annual capex	Operational	2nm leading edge

Chokepoints

The Three Critical Bottlenecks

EUV Lithography

ASML (Netherlands) holds a global monopoly on extreme ultraviolet lithography machines. A single EUV system costs $350M+. No advanced chips can be made without them.

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Advanced Packaging

TSMC's CoWoS (Chip-on-Wafer-on-Substrate) and similar advanced packaging technologies are the bottleneck for AI chip production. Capacity is constrained through 2026.

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Energy Supply

A cutting-edge fab consumes 100+ MW. AI data centres and semiconductor manufacturing compete for the same constrained power. Energy, not silicon, is the binding constraint.

Controls

The Export Control Architecture

US semiconductor export controls, first imposed in October 2022 and progressively tightened, represent the most significant technology denial regime since Cold War-era COCOM restrictions. The controls target China's access to advanced chips (below 14nm logic, advanced memory), chip-making equipment (particularly EUV and advanced DUV from ASML), and design software (EDA tools from Synopsys and Cadence).

US Controls

Advanced chip export restrictions to China (A100/H100 class GPUs and successors)
Equipment controls blocking EUV and advanced DUV sales
Entity list restrictions on Chinese chip designers (Huawei, SMIC) and AI labs
BIOSECURE Act creating pharmaceutical/biotech supply chain parallel

European Position

Netherlands (ASML) and Japan (Tokyo Electron, Nikon) aligned with US on equipment controls
EU Chips Act focuses on building domestic capacity rather than denial
European companies (NXP, Infineon, STMicroelectronics) exposed to China revenue risk
Balancing act between security alignment and commercial interests in Chinese market

Monitoring

What to Watch

Intel Foundry Execution

Intel's 18A process node and foundry strategy are critical tests of whether the US can re-establish leading-edge manufacturing. Delays or yield issues would reinforce TSMC's dominance.

ASML Order Book

ASML's backlog and delivery schedule for High-NA EUV systems (the next-generation lithography platform) is the clearest leading indicator for the semiconductor capacity buildout timeline.

China's Mature-Node Capacity

SMIC and other Chinese fabs are rapidly expanding 28nm and above capacity. A potential glut in mature-node chips could disrupt pricing for European automakers and industrial users.

Conclusion

Strategic Takeaways

Semiconductor sovereignty is the defining industrial policy of the 2020s. The $200B+ annual capex cycle represents a generational investment opportunity across the equipment, materials, and services supply chain.
ASML is Europe's most strategically important company. Its monopoly on EUV lithography gives the Netherlands (and by extension Europe) a chokepoint position in the global semiconductor value chain.
The "friendshoring" thesis is real but expensive. New fabs in the US and Europe cost 30-50% more than equivalent facilities in Asia, creating a structural cost premium that subsidies only partially offset.
Energy is the new silicon. Advanced semiconductor manufacturing and AI compute are competing for the same constrained power supply, creating investment opportunities in energy infrastructure adjacent to semiconductor clusters.
China's response to export controls is accelerating domestic development at mature nodes. A coming glut in 28nm and above chips could benefit European buyers (automotive, industrial) but pressure European chipmakers (Infineon, STMicro, NXP) competing in those segments.